1. Field of the Invention
The present invention relates to a logic description library used when handling a differential input circuit by a logic simulator, and more particularly to a logic description library of differential input circuit in which logic description is expressed by logic primitive.
2. Description of the Related Art
A general differential input circuit functions by detecting a valid input and output response when an output signal responds depending on a voltage difference between differential input signals. That is, depending on the voltage difference between a positive side differential input signal VIN+ and a negative side differential input signal VIN−, the input and output response inverts the logic level of output signal, depending on whether the positive side voltage is higher than the negative side or the negative side voltage is higher than the positive side, which is a response characteristic of general differential input circuit. The voltage level itself of individual differential input signal does not have any specific meaning, and is not handled as valid input and output response in the differential input circuit.
When testing a circuit device having such differential input circuit, it is enough to test by feeding a differential signal having differential voltage ΔVIN as differential input signals VIN+, VIN−, and a voltage application method as shown in FIG. 13 is employed. For example, by fixing the negative side differential input signal VIN− at reference voltage Vref, the input and output response is tested by increasing or decreasing the positive side differential input signal VIN+ from the reference voltage Vref. As a result, a differential signal having differential voltage ΔVIN is obtained as differential input signals VIN+, VIN−. When the positive side differential input signal VIN+ is higher than the negative side differential input signal VIN−, for example, a high level is issued as output expectation value. It has been enough to apply a voltage by fixing one of differential input signals VIN+, VIN− at reference voltage Vref.
At this time, the positive side differential input signal VIN+ and output expectation value are input and output responses in phase. In this relation, to evaluate the operation input circuit action of test pattern of differential input signals VIN+, VIN− applied in test, a logic description library of differential input circuit as shown in FIG. 14 has been used in a conventional logic simulator. The test pattern is generated by a test pattern generator or the like. FIG. 15 is a truth table in the logic description library in FIG. 14.
According to FIGS. 14 and FIG. 15, regardless of the negative side logic input signal DINM which is logic description signal of negative side differential input signal VIN−, the logic level of positive side logic input signal DINP which is logic description signal of positive side differential input signal VIN+ is issued as it is as output expectation value DOUT. The combination of (DINP, DINM)=(0, 1), (1, 0) in logic input signals corresponds respectively to a case of negative side differential input signal VIN− higher than positive side differential input signal VIN+, and a case of negative side differential input signal VIN− lower than positive side differential input signal VIN+, and accordingly the output expectation values are low level (L) and high level (H) respectively, so that a normal input and output response to differential input is realized.
In a general differential input circuit, a valid input and output response characteristic is obtained for the differential voltage between differential input signals, and the voltage level itself of individual differential input signals does not have any specific meaning. Hence, in the truth table (FIG. 15) of the logic description library in FIG. 14, while defining the logic level (state of 0, 1 in FIG. 15) in either logic input signal, it is not necessary to consider a state of undefined logic level (state of X in FIG. 15) about other logic input signal.
In a differential input circuit supporting a new specification represented by USB interface being used recently, not only the differential signal between differential input signals is a valid input signal. It may be also significant when the both differential input signals are at a specified voltage level.
In the logic description library of differential input circuit shown in FIG. 14 and FIG. 15, both differential input signals VIN+ and VIN− may be low level or high level, and such case is expressed as (DINP, DINM)=(0, 0), (1, 1), and each output expectation value is low level (L) and high level (H). This input and output response corresponds to the USB interface. Together with the response characteristic corresponding to the differential signal which is input and output response to (DINP, DINM)=(0, 1), (1, 0), in the condition of defining of voltage levels of positive side/negative side differential input signals VIN+, VIN−, this logic description library may correspond to the differential input circuit used in the USB interface.